Semiconductor industry HKMG battle: two craft schools struggle 4
Currently, Qualcomm's 40nm process for mobile phones and high-performance processors generic chips, the operating frequency reached 1GHz, but its power consumption under control quite well in Google Android smart phone has to use this processor.
Intel Corporation executives MarkBohr process technology, said Intel's AtomSOC chip a year or so will enable the 32nm process technology. When asked about the application of gate-last process after the core of why the chip size will be increased, which is not due to gate-last of its own limitations, leading to changes in circuit design of the die problem of the decreasing density of the time, Bohr said Intel Corporation 45nmgate-lastHKMG process the product changes in circuit design is not applied gate-last as the result, but with the then Intel in the 45nm process products still continue to use the dry lithography. He said, "The reason was that the core will be used for larger design rules, the purpose is not to meet the requirements of Gate-lastHKMG process, but using dry lithography to meet the requirements." (Intel in 45nm process node is still in use dry lithography, until it started using 32nm immersion lithography.)
HKMG technology in the future development trend over time:
High-k insulating layer of material selection, including Intel's Bohr, then you seem to agree that HfO2 in the next period of time continue to be used as a High-K layer of material, the industry will continue the recent improvement of material do HfO2 articles, some manufacturers may also consider to add some special HfO2 layer of material, but they will not put the recent focus on developing leading higher dielectric constant materials.
In addition, some vendors will be on how to reduce the main energy High-k layer below SiO2 interface layer (IL) of thickness, its goal is to High-k dielectric equivalent oxide thickness was 10 when Egypt This can reduce the thickness of the interface to 5 about Egypt. Sematech High-k company executives PaulKirsch research projects, said: "The main industry is now considering more ways to further optimize HfO2 materials, rather than another five years to develop a new High-k materials. From the development time requirements and effectiveness of requirements to consider, the most interesting idea is to consider how to remove SiO2 interface layer and the insulating layer to improve the High-K dielectric constant value. "
Gatefirst on how to effectively remove SiO2 interface layer (ZIL) the advantages and all comments:
Remove SiO2 interface layer, the last December meeting held in IEDM, scientists published many articles about how to remove SiO2 interface layer article (ZIL: zerointerfacelayer), in which IBM's Fishkill technology alliance also announced its own program, and claimed that this program will process in their own gate-first32/28nm use.
TPMa Yale University Professor, ZIL technology, while very attractive, but usually need to use high-temperature process step to remove the SiO2 interface layer, while the gate-first process is just making the gate can withstand such high temperatures, so the technology with gate-first technology companies more favorable. In his view, according to his understanding, ZIL need to use technology to achieve "high-temperature chemical reaction" to effectively remove residual SiO2 gate structure interface layer, so this process on the use of gate-first process manufacturers to achieve together in terms of more difficult for smaller, use gate-last process of the company will try to avoid using high-temperature process step. He also said, IBM and Sematech companies out of the ZIL structure of the system has been able to 5 Å equivalent oxide thickness in the electrical properties to achieve better leakage.
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