System Management Bus – Disposable Wound Dressing Pack – Nose Rinsing Device
SMBus/IC Interoperability
While SMBus is derived from IC, there are several major differences between the specifications of the two busses in the areas of electricals, timing, protocols and operating modes.
Electrical
Input Voltage (VIL and VIH)
When mixing devices, the IC specification defines the VDD to be 5.0 V 10% and the fixed input levels to be 1.5 and 3.0 V. Instead of relating the bus input levels to VDD, SMBus defines them to be fixed at 0.8 and 2.1 V. This SMBus specification allows for bus implementations with VDD ranging from 3 to 5 V.
Sink Current (IOL)
SMBus has a igh Power version 2.0 that includes a 4 mA sink current that cannot be driven by IC chips unless the pull-up resistor is sized to IC-bus levels.
NXP devices have a higher power set of electrical characteristics than SMBus 1.0. The main difference is the current sink capability with VOL = 0.4 V.
SMBus low power = 350 A
SMBus high power = 4 mA
IC-bus = 3 mA
SMBus igh power devices and IC-bus devices will work together if the pull-up resistor is sized for 3 mA.
Frequency (FMAX and FMIN)
The SMBus clock is defined from 10100 kHz while IC can be 0100 kHz, 0400 kHz, 01 MHz and 03.4 MHz, depending on the mode. This means that an IC bus running at less than 10 kHz will not be SMBus compliant since the SMBus devices may time out. Many SMBus devices will however support lower frequencies.
Timing
SMBus defines a clock low time-out, TTIMEOUT of 35 ms. IC does not specify any timeout limit.
SMBus specifies TLOW: SEXT as the cumulative clock low extend time for a slave device. IC does not have a similar specification.
SMBus specifies TLOW: MEXT as the cumulative clock low extend time for a master device. Again IC does not have a similar specification.
SMBus defines both rise and fall time of bus signals. IC does not.
The SMBus time-out specifications do not preclude IC devices co-operating reliably on the SMBus. It is the responsibility of the designer to ensure that IC devices are not going to violate these bus timing parameters.
Protocols
ACK and NACK usage
There are the following differences in the use of the NACK bus signaling: In IC, a slave receiver is allowed to not acknowledge the slave address, if for example is unable to receive because it performing some real time task. SMBus requires devices to acknowledge their own address always, as a mechanism to detect a removable device presence on the bus (battery, docking station, etc.) IC specifies that a slave device, although it may acknowledge its own address, may decide, some time later in the transfer, that it cannot receive any more data bytes. IC specifies that the device may indicate this by generating the not acknowledge on the first byte to follow. Other than to indicate a slave’s device-busy condition, SMBus also uses the NACK mechanism to indicate the reception of an invalid command or data. Since such a condition may occur on the last byte of the transfer, it is required that SMBus devices have the ability to generate the not acknowledge after the transfer of each byte and before the completion of the transaction. This is important because SMBus does not provide any other resend signaling. This difference in the use of the NACK signaling has implications on the specific implementation of the SMBus port, especially in devices that handle critical system data such as the SMBus host and the SBS components.
SMBus protocols
Each message transaction on SMBus follows the format of one of the defined SMBus protocols. The SMBus protocols are a subset of the data transfer formats defined in the IC specifications. IC devices that can be accessed through one of the SMBus protocols are compatible with the SMBus specifications. IC devices that do not adhere to these protocols cannot be accessed by standard methods as defined in the SMBus and ACPI specifications.
Address Resolution Protocol
The SMBus uses IC hardware and IC hardware addressing, but adds second-level software for building special systems. In particular its specifications include an Address Resolution Protocol that can make dynamic address allocations. Dynamic reconfiguration of the hardware and software allow bus devices to be ot-plugged and used immediately, without restarting the system. The devices are recognized automatically and assigned unique addresses. This advantage results in a plug-and-play user interface. In both those protocols there is a very useful distinction made between a System Host and all the other devices in the system that can have the names and functions of masters or slaves.
Time-out feature
SMBus has a time-out feature which resets devices if a communication takes too long. This explains the minimum clock frequency of 10 kHz to prevent locking up the bus. IC can be a C bus, meaning that a slave device stretches the master clock when performing some routine while the master is accessing it. This will notify to the master that the slave is busy but does not want to lose the communication. The slave device will allow continuation after its task is complete. There is no limit in the IC-bus protocol as to how long this delay can be, whereas for an SMBus system, it would be limited to 35 ms. SMBus protocol just assumes that if something takes too long, then it means that there is a problem on the bus and that all devices must reset in order to clear this mode. Slave devices are not then allowed to hold the clock LOW too long.
Packet Error Checking
SMBus 2.0 and 1.1 allow enabling Packet Error Checking (PEC). In that mode, a PEC (packet error code) byte is appended at the end of each transaction. The byte is calculated as CRC-8 checksum, calculated over the entire message including the address and read/write bit. The polynomial used is x8+x2+x+1 (the CRC-8-ATM HEC algorithm, initialized to zero).
SMBALERT#
The SMBus has an extra optional shared interrupt signal called SMBALERT#, which can be used by slaves to tell the host to ask its slaves about events of interest. SMBus also defines a less common “Host Notify Protocol”, providing similar notifications but passing more data and building on the IC multi-master mode.
SMBus Support
SMBus devices are supported by FreeBSD, OpenBSD, NetBSD, DragonFly BSD, Linux, Windows 2000 and newer server editions, and Windows XP and newer desktop editions.
See also
IC (I2C)
Power Management Bus (PMBus)
Advanced Configuration and Power Interface (ACPI)
List of network buses
List of computer standards
External links
SMBus website
SBS forum
SMBus at tech-faq.com
References
^ “System Management Bus (SMBus) Specification Version 2.0”. http://smbus.org/specs/smbus20.pdf. smbus.org
^ “I2C-bus specification and user manual”. http://www.nxp.com/acrobat_download/usermanuals/UM10204_3.pdf. nxp.com
^ “APPLICATION NOTE 476 Comparing the IC Bus to the SMBus”. Maxim. 2000-12-01. http://www.maxim-ic.com/appnotes.cfm/an_pk/476. 090429 maxim-ic.com
^ Designing with SMBus 2.0
^ SMBus.org CRC-8 Calculator
^ CRC-8 for SMBus, PICBasic code
v d e
Computer bus & interconnection standards (wired)
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S-100 bus MBus SMBus Q-Bus ISA Zorro II Zorro III CAMAC FASTBUS LPC HP Precision Bus EISA VME VXI NuBus TURBOchannel MCA SBus VLB PCI PXI HP GSC bus CoreConnect InfiniBand UPA PCI-X AGP PCI Express Intel QuickPath Interconnect HyperTransport more…
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